Here is a question that was asked in the GATE CS examination. It asks to find the number of bits required to color the pages to remove the problem of aliasing in VIPT caches. My peers out there suggested me the HPCA course by Georgia Tech. The lectures there explain the problem of aliasing and deal with the situation where one allows the cache size to be small enough. But here in this question in the exam, there is no bound to the size of the cache, and the number of bits for page coloring is given by :
$$\text{Bits for coloring = No. of bits in index and block offset part of virtual address}$$$$\text{- No. of bits used for page offset}$$
Actually, these are the bits that undergo a change during virtual address translation to a physical address. These virtual address bits used for indexing into the cache can cause two different virtual addresses which map to the same physical memory frame to map to different cache blocks.
But what I do not understand is how the concept of page coloring [using as many bits as we calculated above] the main memory frames removes this problem of aliasing? Please can anyone suggest to me some resource (preferably a video resource) that explains this concept in detail possibly taking examples?
Thank you.
